Chip Wars: Meta's adoption of Google TPUs signals a direct challenge to Nvidia

The artificial intelligence hardware landscape has shifted decisively as Meta began running production workloads on Google’s tensor processing units. This move represents a significant commercial milestone, marking the first instance where Google’s custom AI chips have been sold to an external customer at this scale. By integrating these chips into its core infrastructure, Meta is effectively diversifying its hardware portfolio, a strategic decision that directly pressures Nvidia’s long-standing dominance in the data center market.

The transition was enabled by the release of native PyTorch versions for the SGLang and vLLM inference engines. Previously, running these engines on TPUs required reliance on Google’s JAX framework, a barrier that often deterred developers. The new TorchTPU stack allows PyTorch workloads to run natively on the hardware with minimal code rewriting. Zongwei Zhou, Meta’s PyTorch-TPU lead, confirmed that "SGLang-TorchTPU is running in production at Meta today," citing a close collaboration between Meta, Google, and the SGLang team at startup RadixArk. Jana van Greunen, director of PyTorch engineering at Meta, emphasized that the company "cannot be constrained by a single hardware architecture," highlighting the strategic value of multi-vendor support.

Meta’s relationship with Google silicon is not entirely new, though this marks a deeper integration. Research teams previously used TPUs via the PyTorch/XLA bridge between 2020 and 2023 before those contracts were canceled. The current push appears to be a result of Google targeting Meta specifically, knowing the company preferred to stay within the PyTorch ecosystem rather than migrating to JAX. While the exact location of these production chips remains unclear, reports from last year indicated discussions regarding Google Cloud TPU rentals for 2026 and purchases for 2027, with Meta subsequently signing a multi-year rental agreement.

The timing of this announcement is strategically significant. It occurred just one day after Amazon announced it would open-source TorchNeuron, its native PyTorch backend for Trainium2 and Trainium3 chips. Both moves appear designed to loosen Nvidia’s software lock-in by ensuring that the industry-standard PyTorch framework runs efficiently on alternative silicon. This coordinated effort suggests a broader industry trend toward hardware diversity, driven by the need to reduce dependency on a single supplier for the massive compute demands of large language models.

Performance metrics indicate that the new integration is competitive. A tuned vLLM setup serving the 2.8-trillion-parameter Kimi K3 model reportedly achieved over 700 tokens per second for a single user on the seventh-generation Ironwood TPU. This test, conducted by Inferact, utilized 16 Ironwood chips with speculative decoding and outperformed Nvidia’s GB200 setup, which reached 452 tokens per second. At small batch sizes without speculative decoding, the new kernels deliver roughly 1.4 to 2 times the throughput of the GB200 baseline.

Looking ahead, the SGLang-TorchTPU ecosystem will continue to expand, with support planned for DeepSeek V4.1 Flash and Reflection Beam. RadixArk is also targeting Day 0 support for new open models by the first quarter of 2027. Google, Meta, and RadixArk are expected to share further details at the SGLang Summit 2026, scheduled for November 12–13 in San Francisco, potentially revealing more about the scale of this emerging alternative to Nvidia’s market position.